Static electrical switches



April 19, 1960 D. s. RIDLER ET AL STATIC ELECTRICAL swrrcmzs 4 Sheets-Sheet 1 Filed March 5, 1954 FIG].

Inpuz Input 2 Input 3 Input 4 A tlorney April 19, 1960 D. s. RIDLER ET AL 2,933,688

STATIC ELECTRICAL swrrcass Filed March 5, 1954 4 Sheets-Sheet 2 Q no.3

/npur4 /nput 3 lnput/ lnpufz Waveform I I l A I wvmrm M Waveform C U U Output Inventor: D. S.R|DLER- D.A.WEIR- A.D.ODELL W. Attorney April 19, 1960 D. s. RIDLER ET AL 2,933,683

STATIC ELECTRICAL SWITCHES Filed March 5, 1954 4 Sheets-Sheet 3 Waveform A Input 2 Attorney April 19, 1960 Filed March 5, 1954 D. S. RIDLER ET AL STATIC ELECTRICAL SWITCHES 4 Sheets-Sheet 4 //I out lnputZ Waveform] I A wavegormL I Waveform C Waveform D Waveform E Output c/2 F/GJO lnpf 2 A ttorn e y United States Patent 1 STATIC ELECTRICAL SWITCHES Desmond Sydney Ridler, Donald Adams Weir, and Alexander Douglas Odell, London, England, assignors to International Standard Electric Corporation, New York,N.Y.

The present invention relates to electrical coincidence circuits.

According to the present invention there is provided an electrical coincidence circuit comprising a plurality of groups of inputs, an equal plurality of outputs each associated with one of said groups of inputs, means responsive to the coincidence of electrical conditions on all inputs of each of said groups, means responsive to the end of the electrical condition on an input of each group, and means under control of both responsive means associated with a group of inputs to energise the output associated with that group of inputs and to de-energise a previously energised output associated with any other of said groups of inputs.

According to the present invention there is also provided an electrical coincidence circuit comprising a plurality of. static electrical switches, means responsive to one of said switches assuming its operated condition to cause any other operated switch to assume its non-operated condition, an output from each said switch which is energised only when that switch is operated, a group of inputs associated with each said switch, means responsive to the coincidence of electrical conditions on all inputs associated with each said switch, and means responsive to the end of the electrical condition on one of the inputs of that group of inputs on which said coincidence occurred to operate the switch associated with that group of inputs, whereby said coincidence causes one output to be energised and the previously energised output to be tie-energised. at the end of one of the conditions participating in a coincidence.

According to the present invention there" is further provided an electrical coincidence circuit comprising a plurality of inputs, a flip-flop circuit of the bistable type which is normallyinza first condition; connections from said inputs to said flip-flop such that. on a coincidence of electrical conditions on all ofsaid inputs said fiipfiopis set to its second condition, and that when one of said electrical conditions ends, said flip-flop is reset to its first condition, and means responsive to said resetting to give an output.

. According to our present understanding a static electri cal switch may be defined as a device having a permanently positioned electrical path the effective impedance of which may be either of two different values, change from the one to the other value being effected by an appropriate change in a controlling electric fieldfrom one stable condition to another.

.Accordingly the term static electrical switch, as used in thisspecification, should be interpreted to include any device. falling within the terms of this definition, and in any case includes thermistor trigger circuits, hot or cold cathode dischargetubes, hard tube trigger circuits, metal rectifier circuits and crystal triodes.

The invention will now be described with reference to the accompanying drawings, in which:.

.Fig. 1 is a first embodiment of the invention in which a cold-cathode tube bistable flip-flop is used.

Patented Apr. 19, 1960 Fig. 2 shows a three-tube multi-stable circuit also using cold-cathode tubes. Insuch a circuit the normal condition is with one tube discharging and all other tubes quiescent. When another tube is fired, it automatically extinguishes the other tube.

Fig. 3 shows another embodiment of the invention wherein a hard tube bistable flip-flop is used.

Fig. 4 is a further embodiment of the invention using a hard tube bistable flip-flop.

Fig. 5 shows waveforms encountered in the circuit of Fig. 4.

Fig. 6 is an enlarged view of certain of the waveforms of Fig. 5, as will be described later. 7

Fig. 7 is a bistable flip-flop using cold-cathode tubes each tube of which is controlled by a circuit of the type shown in Fig. 4.

Fig. 8 is-a further embodiment of the a cold cathode tube bistable circuit. 7

Fig. 9 shows waveforms encountered in the circuit of Fig. 8.

Fig. 10 is a further embodiment of the invention using metal rectifiers, such as are described in the application of K. A. Matthews, Serial No. 302,065, filed August 1, 1952, now Patent No. 2,770,763.

The circuits described have all been developed to overcome a disadvantage inherent in conventional coincidence gate circuits. In certain of these circuits, and especially where metal rectifier gates are used, it often happens that a first coincidence is required to operate a first gate, and the operated coincidence is intended to operate a further gate at a later time. If all gates give their outputs at the beginning of the coincidence, itmay happen that a later gate will spuriously operate during that coincidence. This disadvantage is overcome by the present invention.

The circuit of Fig. 1 is a bistable flip-flop circuit using cold-cathode tubes CTA and CTB and having a common anode load resistor R1. If one of these tubes, e.g. tube CTA isdischarging, the current flow'therein produces a voltage drop across that tubes cathode resistor R2, and charges the associated cathode capacitor C1. If the other tube CTB is caused to discharge, current flowing as a result thereof increases the voltage drop across the anode resistor R1. Since C1 in the cathode circuit of CTA is charged, the anode-cathode voltage of CTA is reduced to a value less than the maintaining voltage, so CTA is extinguished. Similarly if CTA is fired when CTB is already discharging, CTB is extinguished.

Associated with these tubes are two further gate tubes G1 and G2 which are also cold-cathode tubes. The circuits of these tubes are identical, so only' G1 will be described. This has in its anode circuit an inductor L1 invention using in parallel with rectifier MR1, and in series therewith G1 falls below the maintenance value, and G1 therefore.

resistor R3. The first input to G1, input No. 1 is a positive pulse input which alone cannot fire G1. The second input to G1, input No. 2 is a negative pulse input which alone cannot fire G1. When both inputs occur simultaneously, G1 is fired. The resistor R3 limits the current flowing in the circuit. The rectifier MR1 ensures that the trigger electrode of CTA cannot go negative with respect to the anode supply voltage of G1. L1 has a resistance which is low compared with that of MRI in its forward direction so most of the current flows in L1, and hence energy is stored in the magnetic field of L1. It is assumed that when the coincidence on inputs 1 and 2 occurred, CTB was discharging.

Since G1 is a cold cathode tube the trigger-electrode circuit has no influence on the tube once discharge has been initiated. Hence the ending of the pulse on input 1 has no effect on the circuit. However, when the negative pulse on input 2 ends, the anode-cathode voltage of a n u s e C r fl w in node ircu th e ore ends, and so the energy stored in L1 is released in the form of a positive-going half-sinusoid which, added to th umn a voltage on he. r sserof .QTA. es TAa t s sh s QIB- T s-r ctifi nM l. pre ntsas de scrib sha e t er v tas Q IA fall n below its up a u h s. h d n he s a d n rh a steady whether G1 conducts or-not.

. The i t s. simila o ha 6 W e the circuit forms part of equipment using a master pulse sou ce. both puts. and o ld h n s ti s s master pulse inputs. Clearly if a coincidence, occurs. between iu utsqn inputs lan 2 wh CIA is dischar g, the half-sinusoid emitted by L1 when G1 cuts off has no eflect.

Fig. 2 is a three-tuhe circuit; havingcold-cathode tubes QTQ, CID-and CTE with their; respective gate tubes G3, G4 ar d G5. The three tubes, CTC, .CTD-and CTEeare interconnected in the'same manner as are CIA and CTB in Fig. 1. Such a circuit having a number of tubes of which one is discharging at .once,.and in which when another tube is fired the previously discharging'tube is extinguished, is referred to as a multi-stable register. Thus Fig, 2 is, a multi-stable register having a gatetube per tube, arranged as in Fig. l, and so no further'descriptionof this circuit is necessary.

r The circuit of Fig 3 uses; a conventionalhard tube flip-flop VA.VB of the cross-coupled type. Associated with each; tube is agate. triode V1, V2, and diodes. D17: DLD37D4, respectively. Assume that VB. isconduct ingand VAis cut; off; As.-before,' inputz1: to. the grid of V1 is positive;going, and input- 2 to the cathode'of-t V1 is negative-going, and-V1 only conductslwhen the coinciglence occurs; of a; pulse on-its cathode and on. its -grid. When Vlz-Qonducts its. anode voltage falls in the usual manner,;-which however has no efieet. However, when thepulse on either input 1'or;input-2. ends,iV1 cuts off and its anode voltage rises. This rise in potential is transmitted'via capacitor C2 and diode D1 to thegrid at VA. VA therefore conducts and cuts VB ofi in the usualflip-fiopmanner. The diodes D1 and D2 isolate VA from the negative-going pulse produced via C2 when V1 conducts, but passes the positive-going pulse produced when .V1. cuts off. V2-D3-.-.-D4 function in thesame manner as :V1.-.D1.'-'.D2. V

This circuit hasgthe-advantage QVEIKfllQPOf-f'Fig. 1- in that positive or negative master pulses can he'uSedjtS' the.termination of the pulse on either-inputto-cause the flip; over. The Figs. 1', 2 and 3 circuits thus all respond to. a coincidencevdf anumben of electrical conditions-, and'- cause a; transference of outputwhenone 7 of those conditions-ends.

Next'to be described is-the circuit of Fig. 4, which will be described' with' reference to the-wavefo rmcharts of Figs.- 51.andi 6; The waveforms designated by letters in Figs. 5 1. andfifare those occurring-at the correspondinglylettered points on Fig. 4.

.Input 1 is the master timing pulse waveform, i.e. the clock pulses, which-asshown in' Fig 5', are short negatiye The wotrio es ve nd vnmge hcr wi hrcsi ors R M f bi tab erdev q cf we dsn nt p When there'is no input on inputz, that terminalwill be at earth potential, and the grid of VD will therefore also be at earth potential as longas the current flowing through. R5 exceeds the current throughRti, It thisisjtheca'se, the excess current flowsthroughthe rectifler. M1 3, bias ing MR3 to its low. 'resistance condition, The grid-of V0 is connected via resistor' R 7 to a. positive potential El, so--the norma1conditionis WiflTfVC conducting. The

represent circuitssuch as Fig; 4.

that both cathodes will be positive with respect to earth,

which with the earth potential on the grid of VD ensures that VD will be held non-conducting.

The negative-going clock pulses are differentiated by C4R7 to produce waveform A, Fig. 5. This consists of a short negative pulse at .the leading edge of the input 1 pulse and a short positive .pulse at the trailing edge. The clock pulse amplitude is such that the short negative pulses cannot lower the potential on the commoned cathode far enough to allow VD to pass current. It, however, the potential on input 2 is made sulficiently positive, the potential of the-grid of-VD will-be raised to. a level s c tha asmal n ga ch n th w n on atha potential will cause'VD to conduct.

Suitable choice of the resistors-R9,. R6 and R5 ensures that as soon as VD conducts V0 is cut oif. The increased current flowing. n the ca hod I 0 n er -th 'of VC more negative with respect to the cathode, and

so-reduces the current flowing in VC. This increases the anode voltage of VC,,which via the bleeder formed by- R2, R6, R5 increases the gridvoltage of VD. Hence VD conducts and VC cuts oil. Waveforms B and C: show this.

;Th us thecoincidence of the positive potential on input 2 and the short negative pulse produced by differentiating a-clock, pulse on input lhas switched the circuit. Neither. of'thesei conditions alone, could have switched thecircuit. Whenthe positive potential. on input 2-arrives halfway through aclock pulse,,there is again no change in;the;state of VCVD, since, as shown in Fig; 5., the negative-going difierentiationproduct pulse has by then. ended- Thus the-positive potential. on input- Imustoccur. while or before a; clock. pulse; occurs; to sWitclr.VC-.VD from VC conducting to .VD conducting.-

To return to the circuit.shown,-.voltages-E1, E2 and. E3. are; so chosen that. the next. short positive pulse, which will. hegthat; produced at thetrailing edge of theclock pulse by'difierentiation, which is applied to'gridof VC causes VCto conduct. 'This .again' produces a cumulative action which results inVC conductingand. VD cuttingv When ND is cut; off on. thetrailing edge of. the,.-clock pulse, its .anode voltage goes-positive, as:v shownii-hy the trailing edge of the negative pulse inwavefbrmC; Fig.5..

This positive-changeapplied viaCS :as a-positive'pulse to thetriggen electrodeofi aicold cathode-tube :C'F; This:

pulse, .with i the positive biassing potential. normally ap-- plied? via: R10, fires CT, which 1 therefore! delivers an out-v p. .t.;:from--its. cathode circuit-by the voltage developed acrosscathode resistor R11. V

':Fig: 6 -showswaVeform A superimposed on wave-- form B, bothwaveforms being drawnto the same scale,

and enlarged over Fig. :5; These waveforms and those of Fig. 5 are, ofcourse, idealised waveforms,"but the waveforms obtained from a practical circuit do not-difier from these in more than detail.

eelearlywoul .berncssssawm .nr vid an ndrth' sshs .n. n

lea connected to th over which a -a matin is nn e it ir ns th anQew asec CT. 2 .0w. smai.nta n. clt se-i Ql nqss b li which. dese e me itiqnh hswn in .E s-J; .is-

flonQ'fi eQQ uch a is us .imth sew wm d mentinv ntion, hich case the qther. half of the; flip-flop could be controlledl.by,a..further flip-flop unit ofl Bis-.Asu Ms D- h da h r t gelesi Fi 7 lqs m na is'e e Qp ra i .Q Z F 5. a a n the-c rcu normally has. VC conducting v and, {YD gut-en... is only changed when the leading edge of a pulse on input 1' with;

coincidence changes VCVD to VD conducting and VC 'cut off. On the trailing edge of the pulse on input 1,

VCVD restores to its normal condition and this restoration operates CT to give an output. Thus the circuit in response to the coincidence of a first and a second electrical condition, stores an indication that the coincidence has occurred, and when the first condition ends it gives an output symbolic of that coincidence.

In the circuit of Fig. 8, the hard tube flip-flop VCVD of Fig. 4 is replaced by a gas tube flip-flop CT GCTH, which has its anodes coupled by a capacitor C6. If one tube is discharging, with its anode voltage relatively low, and the other tube is fired, the other tubes anode voltage falls. This fall in anode voltage is applied via C6 to the first tube and reduces its anode-cathode voltage below the maintaining value, thus extinguishing this tube. The waveforms applicable to this circuit appear in Fig. 9.

As before, input 1 is the master timing waveform, i.e.

the clock pulses, but in this case it is a train of positive going pulses. Input 2 is in this case. a negative-going pulse, and is applied via resistor R12 to the cathode of tube CTG. The clock pulses are difierentiated by C7-R13 and the result of the differentiation is applied via a further capacitor C8 to the primary of a pulse trans-.

former T1, which acts as an inverter. Thus are produced waveforms A and B. For a reason which will be described later T1 is a step-up transformer, so that the narrow pulses applied to CTH are larger than those applied to CTG. v T

Waveform A is applied via R14 to the trigger electrode of CT G and waveform B is applied to the trigger elec-' trode of CTH via resistor R15. -The windings of T1 and resistors R14 and R15 are connected together and to positive E1, which supplies the positive bias for CTG and CTH trigger electrodes. 7 The normal condition is with CTH discharging and both CTG and CT quiescent. CTG is arranged to fire when a negative pulse on input 2 coincides with the leading edge of a positive clock pulse on input 1. As will be seen, this negative pulse input is applied to the cathode of CT G across a metal rectifier MR5, which allows the cathode of CTG to be driven negative, when MR5 blocks, but holds the cathode potential of CTG substantially at earth potential when CTG is discharging.

Neither input 1 alone nor input 2 alone can fire CT G. However, when the positive-going pulse produced by differentiation from the leading edge of a clock pulse occurs while input 2 is supplying a negative pulse, CTG is fired, and this extinguishes CTH. The anode potential of CTH therefore goes positive, and capacitor C9 charges via the anode resistor R16 of CTH. 0n the trailing edge of the master pulse, a sharp positive pulse is applied to the trigger electrode of CTH, and re-fires this tube, whereupon CTG is extinguished via C6 and C9 discharges through the anode-cathode gap of CTH. Hence a large positive pulse is produced across the cathode resistor-R17 of CTH. This is applied via C10, which with R18 differentiates the pulse, to CT, which fires to give its output. As before, resetting means is provided.

It is now clear why T1 is a step-up transformer. CTG is triggered by a combination of a positive pulse on its trigger electrode and a negative pulse on its cathode, while CTH is triggered by a positive pulse on its trigger electrode only. Hence CTH needs a larger pulse on its trigger electrode than CTG, so T1 is a step-up transformer. The negative pulses produced by the differentiation have no effect.

As before CT could be half" of a flip-fiop-in fact the blank rectangles of Fig. 7 could each include a circuit like Fig. 8.

The next embodiment of the invention, shown in Fig. 7

before-mentioned application Serial No. 302,065, filed' August 1, 1952.

These, like many r'netal rectifiers, display anegative resistance portion in the high resistance portion of their:

characteristics. However, unlike normal rectifiers, these devices are so constructed that this negative resistance portion occurs at a lower voltage, and the slope thereof is reduced. This permits the use of such rectifiers as two condition devices. The negative resistance portion is unstable, and consequently when the high-resistance portion of such a rectifier is examined with a cathode-ray.

oscilloscope, a gap in the trace appears between the two stable portions because the oscilloscope cannot'follow the curve. Hence these rectifiers were referred to as negative gap diodes, and will be so designated in this specification.

In the circuit of Fig. 10, the pulse responsive device is a flip-flop using negative gap diodes NGA and N63,.

and the output tube is replaced by negative gap diode NGT. As shown, the positive supply is such as to bias the diodes to their high resistance state. The operation of this circuit is very similar to the circuit of Fig. 8. However, since the diodes are two terminal devices, the

triggering must be introduced in the main and indeed only conducting path. This is permitted by decoupling rectifiers MR5, MR6, MR7 and MR8.

The action of the flip-flop NGA-NGB will first be briefly described. The supply potential biases the diodes to a point near their turnover point, i.e. the point at which a pulse of suitable potential will change their state. It will be assumed that NGA is in its high current or onv state and NGB is in its low current or ofi state. A positive pulse applied to the upper end or anode causes NGB to pass via the unstablenegative resistance region, to its high current or on state in which it remains.

During this pulse, MR5 is biassed' When the pulse ends. to its high resistance state to decouple the other side of the flip-flop from this pulse. When NGB comes on, the increased current in its anode resistor R20 causes a voltage drop thereacross, as a result of which a negative pulse is applied to the anode of NGA via C11 and MR7, whereupon NGA moves to its off state] In the normal state NGB is on and NGA is off. The circuit is such that a negative potential on the cathode and a positive potential on the anode are needed to switch NGA on. This coincidence only occurs when the leading edge of a clock pulse on input 1 occurs during the negative pulse on input 2. In the present circuit negative clock pulses are used, difierentiated by R21-C11 and applied directly to NGB and inverted via T2 to NGA. Hence, on the leading edge of each clock pulse a sharp positive pulse is applied to the anode of NGA. If a negative potential of suitable size is also present on input 2, NGA is switched on, switching NGB ofi. At the end of the clock pulse the sharp positive pulse produced by differentiation restores the flip-flop to its normal state. When NGB comes on, the increased current flow in R22 produces a positive output which is applied via capacitor C12 to the primary of a second pulse transformer T3. This acts as a non-phase reversing step-up transformer, feeding a diode NGT. This sets NGT to its on state. Resetting means (not shown) restores NGT when necessary. Clearly NGT can be half of a flip-flop using negative gap diodes.

In this case T2 would be a step down transformer, ensuring that while a positive pulse on its anode can operate NGA such a pulse cannot operate NGB.

While the principles of the invention have been described above in connection with specific embodiments, and particular modifications thereof, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the invention.

What we claim is:

1. An electrical coincidence circuit comprising a static electrical switch having two conditions of operation, a plurality of inputs, means connected between said switch 7 and said-inputs and responsive to the coincidence of electrtical potentials on 'all' of said inputs for preparing said switch to assume one condition of operation andrespon sive to the end of the said electrical potential on a particular oneof saidinputs for causing said switch to assume saidone condition of operation, and means for producing an outputwhen the operatingcondition of said switch is shifted frompne, of said conditions of, operation to trical potential is removed from a particular one of the.

the coincidenceof predetermined electrical potentialson all inputsthereoff for producing asignaland intending-j said signal when the predetermined-electriaal potenti'aljis' removed from a :particular one of said-;inputs,-second means associated with 'each'g roup ofjnputs for energizing; the output associated with said group of 'inputsand deanergizing a-previously energized output associated with any otherof said groups of inputs; and third meansconnected between said first and second means for preparing for the operation 035 said second means in response to said signal and for causing the operation of said second means at the end of said signal. I V

4. -An electrical coincidence; circuit comprising a plurality of static electrical switches, means responsiveto one of said switches assuming its operated condition to cause Y any other operated switch to assume its non operated condition,- an output from each said switch which is energizedonly when that switch is operated, agroup-of inputs associated-with each said switch, means associated two inputs on which said coincidence occurred, and means connected between each saidfirst means and the associated switch for preparing the operationof said switch in response to said signal and for causing the operation of said switch at the end of said signal, said coincidence.

responsive means comprising a cold cathode gaseous discharge tube, the first of the inputs associated withsaid coincidence responsive means being a positive potential input to the trigger electrode of said'tube and the second of said inputs being a negative potential input to the cathode of said tube, said tube discharging to produce saidsignal as a result of a coincidence of potenti'als on both of said inputs and becoming quiescent to end said signal when, the potential on said second input ends, and in which said means connected between said first means and the associated switch comprises an inductor in the anode circuit of said tube which delivers a pulse to the .associated one of said static electrical switches .when

said tube is cut ofi, said pulse causing said switch to operate.

3. An electrical coincidence circuit comprising a plurality of groups of inputs, an equal plurality of outputs, each associated with one of said groups of inputs, first means associated with each group of inputs responsive to with each group of inputs responsive to thecoincidence of predetermined electrical potentials, on all inputs thereof for producing a signal and for ending said signal when the predetermined electrical potential is removedfrom' a particular one of said inputs andv means connected between the first means andthe associated switch for preparing for the operation of said switch in response to said signal andfor causing the'operation of said switch at:

the end of said signal. 7

5.'A circuit as claimed in claim 4, and in which said: pluralityof switches is ,a bistable flip-flop circuit using; two switches. V V i "RefereucesJCited in the file ofthis patent UNITED STATES. PATENTS 2,443,790 "Forbes; June 22, 1948 2,589,465 Weiner Mar. 18,192 2,644,887 "Wolfe July 7, 1953 2,645,713 Prichard July 14, 1953 2,717,992 Weintraub Sept. 13, 1955 2,766,377 7 Frizzell Oct. 9, 1956 FOREIGN PATENTS 639,800 Great 'Britain July 5,1950 

